CPLD IC

Item No.:

EP2SGX60EF1152C4N

Supplier Details

Country: Taiwan

City: Taipei

Address: 11493 8F, No.79, Chow Tze St

TEL: +886-2-55825588

Fax: +886-2-55805500

Online Showroom: 78 Products

FPGA

Cyclone FPGA Family
Description: Stratix II GX devices include 4 to 20 high-speed transceiver channels, each incorporating clock and data recovery unit (CRU) technology and embedded SERDES capability at data rates of up to 6.375 gigabits per second (Gbps).
Features:
■ Main device features:
- TriMatrix memory consisting of three RAM block sizes to implement true dual-port memory and first-in first-out (FIFO) buffers with performance up to 550 MHz
- Up to 16 global clock networks with up to 32 regional clock networks per device region
- High-speed DSP blocks provide dedicated implementation of multipliers (at up to 450 MHz), multiply-accumulate functions, and finite impulse response (FIR) filters
- Up to four enhanced PLLs per device provide spread spectrum, programmable bandwidth, clock switch-over, real-time PLL reconfiguration, and advanced multiplication and phase shifting
- Support for numerous single-ended and differential I/O standards
- High-speed source-synchronous differential I/O support on up to 71 channels.
Delivery time: 5-7days from distributor
Payment: T/T in advance

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